intel Interlaken 2nd Gen FPGA IP Release Notes
Interlaken (Whakatupuranga Tuarua) Intel® FPGA IP Release Notes
Mena karekau he tuhipoka tuku mo te putanga matua IP motuhake, karekau he huringa o te matua IP ki tera putanga. Mo nga korero mo nga putanga whakahou IP ki runga ki te v18.1, tirohia te Intel Quartus Prime Design Suite Update Release Notes. Ko nga putanga Intel® FPGA IP e rite ana ki nga putanga rorohiko Intel Quartus® Prime Design Suite tae noa ki te v19.1. Ka timata i roto i te putanga rorohiko Intel Quartus Prime Design Suite 19.2, he kaupapa whakaputa hou a Intel FPGA IP. Ka huri te tau Intel FPGA IP (XYZ) me ia putanga rorohiko Intel Quartus Prime. He huringa i roto i:
- Ko te X e tohu ana i te whakahounga nui o te IP. Mena ka whakahouhia e koe te rorohiko Intel Quartus Prime, me whakahou e koe te IP.
- E tohu ana te IP kei roto nga ahuatanga hou. Whakahouhia to IP ki te whakauru i enei ahuatanga hou.
- Ka tohu a Z kei roto i te IP nga huringa iti. Whakahoutia to IP ki te whakauru i enei huringa.
- Intel Quartus Prime Design Suite Update Release Notes
- Interlaken (Whakatupuranga Tuarua) Intel FPGA IP Aratohu Kaiwhakamahi
- Errata mo Interlaken (Whakatupuranga 2) Intel FPGA IP i roto i te Papa Matauranga
- Interlaken (whakatupuranga tuarua) Intel Stratix 2 FPGA IP Hoahoa Exampte Aratohu Kaiwhakamahi
- Interlaken (Whakatupuranga Tuarua) Intel Agilex FPGA IP Design Exampte Aratohu Kaiwhakamahi
- Whakataki ki Intel FPGA IP Cores
Interlaken (Whakatupuranga Tuarua) Intel FPGA IP v2
Ripanga 1. v20.0.0 2020.10.05
| Intel Quartus Prime Putanga | Whakaahuatanga | Pānga |
|
20.3 |
He tautoko taapiri mo te reeti raraunga 25.78125 Gbps. | — |
| I whakarerekehia te tautoko reiti raraunga mai i te 25.3 Gbps ki te 25.28 Gbps me te 25.8 Gbps ki te 25.78125 Gbps. |
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Intel Corporation. Katoa nga mana. Ko Intel, ko te tohu Intel, me etahi atu tohu Intel he tohu hokohoko na Intel Corporation me ona apiti. Ka whakamanahia e Intel te mahinga o ana hua FPGA me nga hua semiconductor ki nga whakaritenga o naianei i runga i te raihana paerewa a Intel, engari ka whai mana ki te whakarereke i nga hua me nga ratonga i nga wa katoa kaore he panui. Karekau he kawenga, he taunahatanga ranei a Intel i puta mai i te tono, i te whakamahi ranei i nga korero, hua, ratonga ranei e whakaahuatia ana i konei engari i whakaaehia i roto i te tuhi a Intel. Ka tohutohuhia nga kaihoko a Intel ki te tiki i te putanga hou o nga whakaritenga taputapu i mua i te whakawhirinaki ki nga korero kua whakaputaina me i mua i te tuku ota mo nga hua, ratonga ranei.
Ko etahi atu ingoa me etahi atu tohu ka kiia he taonga na etahi atu.
Interlaken (Whakatupuranga Tuarua) Intel FPGA IP v2
Ripanga 2. v19.3.0 2020.06.22
| Intel Quartus Prime Putanga | Whakaahuatanga | Pānga |
|
19.3.0 |
Kei te tautoko te IP inaianei i te ahua Interlaken Look-aside. | — |
| He mea hou Whakahohehia te aratau titiro-taha Interlaken tawhā i roto i te ētita tawhā IP. | Ka taea e koe te whirihora i te IP i roto i te aratau Interlaken Titiro-taha. | |
| Te whiriwhiri aratau whakawhiti ka tangohia te tawhā mai i te putanga o naianei o te rorohiko Intel Quartus Prime. |
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| I taapirihia te tautoko reiti raraunga 12.5 Gbps mo te maha o nga huarahi 10 i roto i te H- tile me te E-tile (aratau NRZ) nga rereketanga IP matua. |
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| I tangohia nga tohu e whai ake nei mai i te IP:
• rx_pma_raraunga • tx_pma_data • itx_hungry • itx_hungry |
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| Kua taapirihia i muri i nga tohu hou:
• sop_cntr_inc1 • eop_cntr_inc1 • rx_xcoder_uncor_feccw • itx_ch0_xon • irx_ch0_xon • itx_ch1_xon • irx_ch1_xon • itx_mana • irx_valid • itx_idle • irx_idle • itx_ctrl • itx_credit • irx_credit |
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| I tangohia i muri i nga waahanga e rua mai i te mapi rehita:
• 16'h40- TX_READY_XCVR • 16'h41- RX_READY_XCVR |
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| Te whakamatautau taputapu o te hoahoa exampKei te waatea inaianei mo nga taputapu Intel Agilex™. | Ka taea e koe te whakamatautau i te hoahoa exampi runga i te Intel Agilex F- series Transceiver-SoC Development Kit. | |
| Ka taea e koe te huri i te reiti raraunga me te auau karaka tohutoro whakawhiti ki nga uara rereke mo to tauira IP Interlaken (Whakatupuranga Tuarua) e aro ana ki te taputapu Intel Stratix® 2 H-tile, E-tile ranei. Tirohia tenei KDB mo nga korero mo te whakarereke i te reeti raraunga. |
Ka taea e koe te whakarite i nga reiti raraunga i runga i nga taera. |
Interlaken (Whakatupuranga Tuarua) Intel FPGA IP v2
Ripanga 3. v19.2.1 2019.09.27
| Intel Quartus Prime Putanga | Whakaahuatanga | Pānga |
|
19.3 |
Te tukunga a te iwi mo nga taputapu Intel Agilex me nga kaiwhakawhiti E-tile. | — |
| I whakaingoatia ano te Interlaken (Whakatupuranga Tuarua) Intel Stratix 2 FPGA IP ki Interlaken (Whakatupuranga Tuarua) Intel FPGA IP |
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Interlaken (Whakatupuranga Tuarua) Intel Stratix 2 FPGA IP v10 Whakahōu 18.1
Ripanga 4. Putanga 18.1 Whakahoutanga 1 2019.03.15
| Whakaahuatanga | Pānga |
| Kua taapirihia te tautoko aratau-waahanga maha. | — |
| Kua tapirihia Tuhinga o mua tawhā. | — |
| • He tautoko taapiri mo nga huinga huarahi me te reiti raraunga e whai ake nei:
— Mo nga taputapu Intel Stratix 10 L-tile: • 4 ara me te 12.5/25.3/25.8 Gbps reiti huarahi • 8 ara me te 12.5 Gbps reiti huarahi — Mo nga taputapu Intel Stratix 10 H-tile: • 4 ara me te 12.5/25.3/25.8 Gbps reiti huarahi • 8 ara me te 12.5/25.3/25.8 Gbps reiti huarahi • 10 huarahi me te 25.3/25.8 Gbps reiti huarahi — Mo nga taputapu Intel Stratix 10 E-tile (NRZ): • 4 ara me te 6.25/12.5/25.3/25.8 Gbps reiti huarahi • 8 ara me te 12.5/25.3/25.8 Gbps reiti huarahi • 10 huarahi me te 25.3/25.8 Gbps reiti huarahi • 12 nga huarahi me te 10.3125 Gbps tere tere |
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| • Kua taapirihia nga tohu atanga kaiwhakamahi tuku hou e whai ake nei:
— itx_eob1 — itx_eopbits1 — itx_chan1 |
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| • I taapirihia nga tohu atanga kaiwhakamahi hou e whai ake nei:
— irx_eob1 — irx_eopbits1 — irx_chan1 — irx_err1 — irx_err |
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Interlaken (Whakatupuranga Tuarua) Intel Stratix 2 FPGA IP v10
Ripanga 5. Putanga 18.1 2018.09.10
| Whakaahuatanga | Pānga | Notes |
| I whakaingoatia ano te taera tuhinga hei Interlaken (Whakatupuranga Tuarua) Intel Stratix 2 FPGA IP Aratohu Kaiwhakamahi |
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| Kua taapirihia te tauira whakatairite VHDL me te tautoko i te waahi whakamatautau mo Interlaken (Whakatupuranga Tuarua) IP matua. |
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| Kua taapirihia nga rehita hou e whai ake nei ki te matua IP: | ||
| • TX_READY_XCVR | ||
| • RX_READY_XCVR
• ILKN_FEC_XCODER_TX_ILLEGAL_ STATE |
— | Kei te waatea noa enei rehita i roto i nga rereketanga taputapu Intel Stratix 10 E-Tile. |
| • ILKN_FEC_XCODER_RX_ILLEGAL_ STATE |
Interlaken (Whakatupuranga Tuarua) Intel FPGA IP v2
Ripanga 6. Putanga 18.0.1 Hōngongoi 2018
| Whakaahuatanga | Pānga | Notes |
| He tautoko taapiri mo nga taputapu Intel Stratix 10 me nga kaiwhakawhiti E-Tile. |
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| Kua taapirihia te tautoko reiti raraunga 53.125 Gbps mo nga taputapu Intel Stratix 10 E-Tile i roto i te aratau PAM4. |
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| Kua taapirihia te tohu karaka mac_clkin mo nga taputapu Intel Stratix 10 E-Tile i te aratau PAM4 |
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Interlaken (Whakatupuranga Tuarua) Intel FPGA IP v2
Ripanga 7. Putanga 18.0 Haratua 2018
| Whakaahuatanga | Pānga | Notes |
| I whakaingoatia ano te Interlaken IP matua (whakatupuranga tuarua) ki Interlaken (whakatupuranga tuarua) Intel FPGA IP kia rite ki te rebranding Intel. |
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| Kua taapirihia te tautoko reiti raraunga 25.8 Gbps mo te maha o nga huarahi 6 me te 12. |
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| He tautoko taapiri mo te Cadence Xcelium * simulator Whakarara. |
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Interlaken IP Core (Whakatupuranga Tuarua) v2
Ripanga 8. Putanga 17.1 Noema 2017
| Whakaahuatanga | Pānga | Notes |
| Tukunga tuatahi i roto i te Intel FPGA IP Library. | — | — |
Nga korero e pa ana
Interlaken IP Core (Whakatupuranga Tuarua) Aratohu Kaiwhakamahi
Interlaken (Whakatupuranga Tuarua) Intel FPGA IP Kaiwhakamahi Aratohu Archives
| Putanga Quartus | Putanga Matua IP | Aratohu Kaiwhakamahi |
| 20.2 | 19.3.0 | Interlaken (Whakatupuranga Tuarua) FPGA IP Aratohu Kaiwhakamahi |
| 19.3 | 19.2.1 | Interlaken (Whakatupuranga Tuarua) FPGA IP Aratohu Kaiwhakamahi |
| 19.2 | 19.2 | Interlaken (Whakatupuranga Tuarua) FPGA IP Aratohu Kaiwhakamahi |
| 18.1.1 | 18.1.1 | Interlaken (Whakatupuranga Tuarua) Intel Stratix 2 FPGA IP Aratohu Kaiwhakamahi |
| 18.1 | 18.1 | Interlaken (Whakatupuranga Tuarua) Intel Stratix 2 FPGA IP Aratohu Kaiwhakamahi |
| 18.0.1 | 18.0.1 | Interlaken (Whakatupuranga Tuarua) FPGA IP Aratohu Kaiwhakamahi |
| 18.0 | 18.0 | Interlaken (Whakatupuranga Tuarua) Intel FPGA IP Aratohu Kaiwhakamahi |
| 17.1 | 17.1 | Interlaken IP Core (Whakatupuranga Tuarua) Aratohu Kaiwhakamahi |
He rite nga putanga IP ki nga putanga rorohiko Intel Quartus Prime Design Suite ki te v19.1. Mai i te putanga rorohiko Intel Quartus Prime Design Suite 19.2 i muri mai ranei, he kaupapa whakaputa IP hou nga konae IP. Ki te kore e whakarārangitia he putanga matua IP, ka pa te aratohu kaiwhakamahi mo te putanga matua IP o mua.
Tuhinga / Rauemi
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intel Interlaken 2nd Gen FPGA IP Release Notes [pdf] Tohutohu Interlaken 2nd Gen FPGA IP Release Notes, Interlaken 2nd Gen, FPGA IP Release Notes |
