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Pouaka Pouaka Kiritaki Intel® FPGA IP Tuku Panui

 

Pouaka Pouaka Kiritaki Intel® FPGA IP Tuku Panui

Nga putanga rorohiko Intel® Prime Design Suite tae noa ki te v19.1. Ka timata i roto i te putanga rorohiko Intel Quartus Prime Design Suite 19.2, he kaupapa whakaputa hou a Intel FPGA IP.
He rite nga putanga IP FPGA ki te Intel Quartus®
Ka huri te tau Intel FPGA IP (XYZ) me ia putanga rorohiko Intel Quartus Prime. He huringa i roto i:

  • Ko te X e tohu ana i te whakahounga nui o te IP. Mena ka whakahouhia e koe te rorohiko Intel Quartus Prime, me whakahou e koe te IP.
  • E tohu ana te IP kei roto nga ahuatanga hou. Whakahouhia to IP ki te whakauru i enei ahuatanga hou.
  • Ka tohu a Z kei roto i te IP nga huringa iti. Whakahoutia to IP ki te whakauru i enei huringa.

Nga korero e pa ana

  • Intel Quartus Prime Design Suite Update Release Notes
  • Whakataki ki Intel FPGA IP Cores
  • Kaitaki Pouaka Pouaka Intel FPGA IP Aratohu Kaiwhakamahi
  • Errata mo etahi atu matua IP i roto i te Papa Matauranga

1.1. Kiritaki Pouakameera Intel FPGA IP v20.2.0
Ripanga 1. v20.2.0 2022.09.26

Intel Quartus
Putanga Pirimia
Whakaahuatanga Pānga
22.3 Kua taapirihia te tautoko LibRSU me te tukatuka Nios® V hei whakamahi me te kaiwhakahaere taputapu haumaru (SDM).

1.2. Kiritaki Pouakameera Intel FPGA IP v20.1.2
Ripanga 2. v20.1.2 2022.03.28

Intel Quartus
Putanga Pirimia
Whakaahuatanga Pānga
22. He whakautu whakahōu mo te tono CONFIG_STATUS hei whakauru i nga korero mo te puna karaka whirihoranga. Whakaaetia te whirihoranga o te FPGA kaore he taera refclk i te wa o te whirihoranga.
Whakanuia te rehita mana haukoti (ISR) me te whakaahuru ka taea te rehita (IER) ki te taapiri i te whakamarutanga mo te whakahau/whakautu me te panui/tuhi FIF0s.
Kua tangohia te tono pouaka mēra REBOOT_HPS i te mea kaore tenei tono i te waatea mo tenei IP.

Intel Corporation. Pūmau te mana. Ko Intel, ko te tohu Intel, me etahi atu tohu Intel he tohu hokohoko na Intel Corporation me ona apiti. Ka whakamanahia e Intel te mahinga o ana hua FPGA me nga hua semiconductor ki nga whakaritenga o naianei i runga i te raihana paerewa a Intel, engari ka whai mana ki te whakarereke i nga hua me nga ratonga i nga wa katoa kaore he panui. Karekau a Intel he kawenga, he taunahatanga ranei i puta mai i te tono, i te whakamahinga ranei o nga korero, hua, ratonga ranei e whakaahuatia ana i konei engari ko nga mea i tino whakaaehia a Intel. Ka tohutohuhia nga kaihoko a Intel ki te tiki i te putanga hou o nga whakaritenga taputapu i mua i te whakawhirinaki ki nga korero kua whakaputaina me i mua i te tuku ota mo nga hua, ratonga ranei.
*Ko etahi atu ingoa me etahi atu tohu ka kiia he taonga na etahi atu.

1.3. Kiritaki Pouakameera Intel FPGA IP v20.1.1
Ripanga 3. v20.1.1 2021.12.13

Intel Quartus
Putanga Pirimia
Whakaahuatanga Pānga
21.4 • Kua whakahōuhia te ingoa tawhā ratonga crypto motuhake mai i
HAS_OFFLOAD hei Whakahohe i te Ratonga Crypto
• Whakakapi safeclib memcpy whakatinanatanga ki te tikanga
memcpy i te taraiwa HAL.

1.4. Kiritaki Pouakameera Intel FPGA IP v20.1.0
Ripanga 4. v20.1.0 2021.10.04

Intel Quartus
Putanga Pirimia
Whakaahuatanga Pānga
21.3 Kua taapirihia te tawhā HAS_OFFLOAD hei tautoko i te tuhinga tuhi
te utaina. Kei te waatea noa tenei waahanga mo nga taputapu Intel Agilex™.
Ina whakaritea, ka taea e te IP te
crypto AXI initiator atanga.
I hurihia te nama waahanga Tuhinga Tuku mai i te RN-1201 ki
RN-1259.

1.5. Kiritaki Pouakameera Intel FPGA IP v20.0.2
Ripanga 5. v20.0.2 2021.03.29

Intel Quartus Prime Putanga Whakaahuatanga Pānga
21. He tautoko taapiri ki te tautuhi i nga rehita whakaroa i te Timer 1 me te Timer 2 i te wa o te korero a te Kiritaki Pouaka Pouaka a Intel FPGA IP. Karekau he paanga ki te Timer 1 me te Timer 2 e rehita ana i te whakamahinga ki te putanga rorohiko Intel Quartus Prime mai i te 20.2 me te 20.4.
Me whakahou e koe te
Pouaka Pouaka Kiritaki Intel FPGA IP ka neke mai i Intel
Putanga rorohiko Quartus Prime 20.4 o mua atu ranei ki te putanga rorohiko Intel Quartus Prime 21.1.
He tautoko taapiri kia taea ai te hono hononga i waenga i te Kiritaki Pouaka Pouaka Intel FPGA IP IRQ tohu me te tohu IRQ tukatuka Nios II. Me heke koe ki te putanga rorohiko Intel Quartus Prime 21.1 me te whakahou i te Kiritaki Pouakameera Intel FPGA IP kia taea ai tenei ahuatanga.

1.6. Kiritaki Pouakameera Intel FPGA IP v20.0.0
Ripanga 6. v20.0.0 2020.04.13

Intel Quartus
Putanga Pirimia
Whakaahuatanga Pānga
20. He tautoko taapiri mo te haukoti EOP_TIMEOUT e tohu ana ko te whakahau katoa kaore i uru te Whakamutunga o te Pakete. Ka taea e koe te whakamahi i enei haukoti ki te hapai i te rapunga hapa mo nga tauwhitinga kaore i oti.
He tautoko taapiri mo te aukati BACKPRESSURE_TIMEOUT e tohu ana i puta he hapa i roto i te SDM.

1.7. Kiritaki Pouakameera Intel FPGA IP v19.3
Ripanga 7. v19.3 2019.09.30

Intel Quartus
Putanga Pirimia
Whakaahuatanga Pānga
19. He tautoko taputapu taapiri mo nga taputapu Intel Agilex. Ka taea e koe te whakamahi i tenei IP ki nga taputapu Intel Agilex.
He tautoko taapiri mo te haukoti COMMAND_INVALID e tohu ana i te roanga o te whakahau kua tohua kaore te pane e taurite ki te tono i tukuna. Ka taea e koe te whakamahi i tenei haukoti ki te tautuhi i nga tono kua he.
I hurihia te ingoa o tenei IP mai i te Kiritaki Pouaka Pouaka Intel FPGA Stratix 10 ki te Kiritaki Pouaka Pouaka Intel FPGA IP. Kei te tautoko tenei IP inaianei i nga taputapu Intel Stratix® 10 me Intel Agilex. Whakamahia te ingoa hou hei kimi i tenei P i roto i te rorohiko Intel Quartus Prime, i runga ranei i te web.
Kua taapirihia te hanganga putanga IP hou. Ka huri pea te nama putanga IP mai i tetahi putanga rorohiko Intel Quartus Prime ki tetahi atu.

1.8. Intel FPGA Stratix 10 Kiritaki Pouaka Pouaka v17.1
Ripanga 8. v17.1 2017.10.30

Intel Quartus
Putanga Pirimia
Whakaahuatanga Pānga
17. Tukunga tuatahi.

1.9. Pouakameera Kiritaki Intel FPGA IP Kaiwhakamahi Aratohu Archives
Mo nga putanga hou me nga putanga o mua o tenei aratohu kaiwhakamahi, tirohia ki te Kaitono Pouaka reta Intel FPGA IP Aratohu Kaiwhakamahi. Mena karekau he IP, he putanga rorohiko ranei i te raarangi, ka pa te aratohu kaiwhakamahi mo te IP o mua, te putanga rorohiko ranei.
He rite nga putanga IP ki nga putanga rorohiko Intel Quartus Prime Design Suite ki te v19.1. Mai i te putanga rorohiko Intel Quartus Prime Design Suite 19.2 i muri mai ranei, he kaupapa whakaputa IP hou nga konae IP.

Kiritaki Pouaka Pouaka Intel®
FPGA IP Release Notes
Tuku Urupare

Tuhinga / Rauemi

Intel Pouaka Pouaka Kiritaki Intel FPGA IP [pdf] Aratohu Kaiwhakamahi
Pouakameera Kiritaki Intel FPGA IP, Kiritaki Intel FPGA IP, Intel FPGA IP, FPGA IP, IP

Tohutoro

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Ka kore e whakaputaina to wahitau imeera. Kua tohua nga mara e hiahiatia ana *