WhakaatuPort Agilex F-Tapa FPGA IP Hoahoa Example
Aratohu Kaiwhakamahi
Whakahoutia mo Intel® Quartus® Prime Design Suite: 21.4
Putanga IP: 21.0.0
DisplayPort Intel FPGA IP Hoahoa Exampte Aratohu Timata Tere
Ko te DisplayPort Intel® FPGA IP hoahoa exampKo nga taputapu mo nga taputapu Intel Agilex™ F-tile kei roto i tetahi papa whakamatautau me tetahi hoahoa taputapu e tautoko ana i te whakahiato me te whakamatautau taputapu.
Ko te DisplayPort Intel FPGA IP e tuku ana i nga tauira hoahoa e whai ake neiampiti:
- Whakaaturanga SST whakarara whakarara whakamuri karekau he kōwae Whakaora Karaka Pika (PCR) i te reiti pateko
Ina hanga e koe he hoahoa exampte, te ētita tawhā hanga aunoa i te files e tika ana ki te whaihanga, whakahiato, me te whakamatautau i te hoahoa i roto i te taputapu.
Tuhipoka: Ko te putanga rorohiko a Intel Quartus® Prime 21.4 anake e tautoko ana i te Hoahoa Tuatahi Example mo te Whakatairanga, te Whakakotahitanga, te Whakaemi, me nga kaupapa tātari Wā. Kaore i te tino manatokohia nga mahi taputapu.
Whakaahua 1. Whanaketanga Stages
Nga korero e pa ana
- Whakaaturanga Whakaaturanga Intel FPGA IP Aratohu Kaiwhakamahi
- Heke ki Intel Quartus Prime Pro Edition
1.1. Hanganga Whaiaronga
Whakaatu 2. Hanganga Whaiaronga
Ripanga 1. Hoahoa Exampte Waehanga
Kōpaki | Files |
rtl/matua | dp_core.ip |
dp_rx.ip | |
dp_tx.ip | |
rtl/rx_phy | dp_gxb_rx/ ((Paraka hangahanga DP PMA UX) |
dp_rx_data_fifo.ip | |
rx_top_phy.sv | |
rtl/tx_phy | dp_gxb_rx/ ((Paraka hangahanga DP PMA UX) |
dp_tx_data_fifo.ip | |
dp_tx_data_fifo.ip |
1.2. Nga Whakaritenga Pumau me nga Pūmanawa
Ka whakamahia e Intel nga taputapu me nga rorohiko e whai ake nei hei whakamatautau i te hoahoa o muaample:
Pūmārō
- Intel Agilex I-Series Development Kit
Pūmanawa
- Intel Quartus Prime
- Synopsys* VCL Simulator
1.3. Te whakaputa i te Hoahoa
Whakamahia te DisplayPort Intel FPGA IP ētita tawhā i roto i te rorohiko Intel Quartus Prime hei whakaputa i te hoahoa o muaample.
Whakaatu 3. Te Whakaputa i te Rere Hoahoa
- Tīpakohia nga Utauta ➤ IP Catalog, ka kowhiria te Intel Agilex F-tile hei whanau taputapu e whaaia ana.
Tuhipoka: Ko te hoahoa exampKa tautoko noa i nga taputapu Intel Agilex F-tile. - I roto i te Putumōhio IP, kimihia ka paato-rua DisplayPort Intel FPGA IP. Ka puta te matapihi Rerekē IP Hou.
- Tauwhāitihia he ingoa taumata-runga mo to rereketanga IP ritenga. Ka tiakina e te ētita tawhā ngā tautuhinga rerekētanga IP i roto i te a file whakaingoatia .ip.
- Ka taea e koe te kowhiri i tetahi taputapu Intel Agilex F-tile i te mara Pūrere, ka pupuri ranei i te whiringa taputapu rorohiko Intel Quartus Prime taunoa.
- Pāwhiritia OK. Ka puta te ētita tawhā.
- Whirihorahia nga tawhā e hiahiatia ana mo te TX me te RX
- I runga i te Hoahoa Exampi te ripa, tohua Whakaaturanga SST Whakarara Whakamuri Kore he PCR.
- Tīpakohia te Whakaakoranga hei whakaputa i te pae whakamatautau, ka kowhiria te Synthesis hei whakaputa i te hoahoa taputapu example. Me whiriwhiri koe i tetahi o enei whiringa hei whakaputa i te hoahoa o muaample files. Mena ka tohua e koe nga mea e rua, ka roa ake te wa whakatipuranga.
- Pāwhiritia Whakaputa Exampte Hoahoa.
1.4. Whakatauhanga i te Hoahoa
Ko te DisplayPort Intel FPGA IP hoahoa exampKa whakatauirahia e te testbench he hoahoa loopback rangatū mai i te tauira TX ki te tauira RX. Ko te tauira whakaputa tauira ataata o roto ka peia te tauira DisplayPort TX ka hono te putanga ataata tauira RX ki nga kaitaki CRC i te papa whakamatautau.
Whakaatu 4. Rere Whakatau Hoahoa
- Haere ki te kōpaki simulator Synopsys ka kowhiri i te VCS.
- Whakahaere hōtuhi whaihanga.
Puna vcs_sim.sh - Ka mahia e te tuhinga te Quartus TLG, ka whakahiato me te whakahaere i te papa whakamatautau i roto i te simulator.
- Tātarihia te hua.
Ka mutu te whaihanga angitu me te whakataurite o te Puna me te Sink SRC.
1.5. Te whakahiato me te Whakahoahoa i te Hoahoa
Whakaatu 5. Te whakahiato me te Whakahoahoa i te Hoahoa
Hei whakahiato me te whakahaere i tetahi whakamatautau whakaaturanga mo te taputapu exampte hoahoa, whai i enei mahi:
- Me whakarite taputapu exampKua oti te whakatipuranga hoahoa.
- Whakarewahia te rorohiko Intel Quartus Prime Pro Edition ka tuwhera /quartus/agi_dp_demo.qpf.
- Pāwhiritia te Tukatuka ➤ Tīmata te Whakaemi.
- Taria kia oti ra ano te Whakaemi.
Tuhipoka: Ko te hoahoa exampe kore e te manatoko mahi Tuhinga o mua Hoahoa Exampi runga i nga taputapu i tenei tukunga Quartus.
Nga korero e pa ana
Intel Agilex I-Series FPGA Development Kit Aratohu Kaiwhakamahi
1.6. DisplayPort Intel FPGA IP Hoahoa Exampte Tawhā
Ripanga 2. DisplayPort Intel FPGA IP Design Example Tawhā mo te Pūrere Intel Agilex F-tile
Tawhā | Uara | Whakaahuatanga |
Hoahoa Wātea Example | ||
Tohua Hoahoa | • Kore • Whakaaturanga SST Whakarara Whakamuri kore PCR |
Tīpakohia te hoahoa exampkia hangaia. • Kore: No hoahoa exampKei te waatea te mo te kowhiringa tawhā o naianei • Whakaaturanga Tauranga SST Parallel Loopback kaore he PCR: Ko tenei hoahoa exampe whakaatu ana i te whakarara whakarara mai i te totohu DisplayPort ki te puna WhakaatuPort me te kore he kōwae Whakaora Karaka Pika (PCR) ina ka whakahoe koe i te tawhā Tauranga Tauranga Whakaaturanga Ataata. |
Hoahoa Example Files | ||
whaihanga | Kei, Weto | Tahurihia tenei whiringa ki te whakaputa i nga mea e tika ana files mo te papa whakamatautau whaihanga. |
Te whakahiato | Kei, Weto | Tahurihia tenei whiringa ki te whakaputa i nga mea e tika ana files mo Intel Quartus Prime whakahiato me te hoahoa taputapu. |
Hōputu HDL Hangaia | ||
Whakaputa File Whakahōputu | Verilog, VHDL | Tīpakohia te whakatakotoranga HDL e pai ana koe mo te hoahoa o muaample filewhakatakotoria. Tuhipoka: Ko tenei whiringa anake ka whakatau i te whakatakotoranga mo te IP taumata teitei i hangaia files. Ko era atu katoa files (hei tauiraample testbenches me te taumata o runga files mo te whakaaturanga taputapu) kei te whakatakotoranga Verilog HDL. |
Kete Whanaketanga Whainga | ||
Whiriwhiria te Poari | • Kaore he Kete Whanaketanga • Intel Agilex I-Series Kete Whakawhanaketanga |
Tīpakohia te papa mo te hoahoa kua whakariteaample. • Kore He Kete Whakawhanaketanga: Ka whakakorehia e tenei whiringa nga waahanga taputapu katoa mo te hoahoa o muaample. Ka tautuhia e te matua IP nga mahi titi katoa ki nga titi mariko. • Intel Agilex I-Series FPGA Development Kit: Ko tenei whiringa ka kowhiri aunoa i te taputapu whaainga o te kaupapa kia rite ki te taputapu kei runga i tenei kete whanaketanga. Ka taea e koe te huri i te taputapu whaainga ma te whakamahi i te tawhā Hurihia te Pūrere Target mena he rereke nga taputapu o to arotake poari. Ko te matua IP e whakatakoto ana i nga taumahi titi katoa e ai ki te kete whanaketanga. Tuhipoka: Hoahoa Tuatahi ExampKaore i te manatokohia te mahi i runga i nga taputapu i tenei tukunga Quartus. • Kete Whakawhanake Ritenga: Ma tenei whiringa ka taea te hoahoa exampkia whakamatauria ki te kete whanaketanga tuatoru me te Intel FPGA. Ka hiahia pea koe ki te whakarite i nga taumahi titi ki a koe ake. |
Pūrere Whāinga | ||
Hurihia te Pūrere Target | Kei, Weto | Whakakāhia tēnei kōwhiringa ka kōwhiri i te momo taputapu pai ake mo te kete whanaketanga. |
Hoahoa Loopback Whakarara Examples
Ko te DisplayPort Intel FPGA IP hoahoa exampKa whakaatuhia e matou te hurihanga whakarara mai i te tauira DisplayPort RX ki te tauira DisplayPort TX kaore he waahanga Whakaora Karaka Pika (PCR) i te reiti pateko.
Ripanga 3. DisplayPort Intel FPGA IP Design Example mo te Pūrere Intel Agilex F-tile
Hoahoa Example | Tohunga | Reiti Raraunga | Aratau Channel | Momo Whakamuri |
Whakaaturanga SST whakarara whakarara whakamuri karekau he PCR | Tauranga Whakaatu SST | HBR3 | Simplex | Whakarara kore PCR |
2.1. Intel Agilex F-tile DisplayPort SST Parallel Loopback Design Features
Ko te SST whakarara hoahoa loopback exampE whakaatu ana te tukunga o te roma ataata kotahi mai i te totohu DisplayPort ki te puna WhakaatuPort kaore he Whakaora Karaka Pika (PCR) i te reiti pateko.
Whakaahua 6. Intel Agilex F-tile DisplayPort SST Parallel Loopback kahore PCR
- I roto i tenei momo rereke, ka kaina te tawhā o te puna DisplayPort, TX_SUPPORT_IM_ENABLE, ka whakamahia te atanga atahanga ataata.
- Ka whiwhi te totohu DisplayPort i te riipene ataata me te ororongo mai i te puna ataata o waho penei i te GPU ka wetewetehia ki te atanga ataata whakarara.
- Ko te putanga ataata totohu o DisplayPort ka peia tika te atanga ataata puna DisplayPort me te whakawaehere ki te hononga matua DisplayPort i mua i te tuku ki te aroturuki.
- Ka peia e te IOPLL te totohu DisplayPort me nga karaka ataata puna i te auau kua whakaritea.
- Mena kua whirihorahia te totohu DisplayPort me te tawhā MAX_LINK_RATE o te puna ki te HBR3 me te PIXELS_PER_CLOCK ki te Quad, ka rere te karaka ataata ki te 300 MHz hei tautoko i te reiti pika 8Kp30 (1188/4 = 297 MHz).
2.2. Kaupapa Karaka
Ko te kaupapa karaka e whakaatu ana i nga rohe karaka i roto i te hoahoa DisplayPort Intel FPGA IP example.
Whakaahua 7. Intel Agilex F-tile DisplayPort Transceiver kaupapa karaka
Ripanga 4. Waitohu Kaupapa Karaka
Karaka i te hoahoa | Whakaahuatanga |
SysPLL refclk | Karaka tohutoro PLL Pūnaha F-tile he karaka karaka ka wehea e te Pūnaha PLL mo taua auau putanga. I roto i tenei hoahoa exampKo te system_pll_clk_link me te rx/tx refclk_link kei te tiri ano i te SysPLL refclk he 150Mhz. Me he karaka rere kore utu e hono ana mai i te titi karaka tohutoro tohutoro kua whakatapua ki te tauranga karaka whakauru o Tohutoro me te Pūnaha PLL Karaka IP, i mua i te hono i te tauranga whakaputa e rite ana ki a DisplayPort Phy Top. |
system_pll_clk_link | Ko te iti o te auau putanga PLL Pūnaha hei tautoko i te reiti Whakaaturanga katoa he 320Mhz. Ko tenei hoahoa exampKa whakamahi te 900 Mhz (te teitei) te auau whakaputa kia taea ai e SysPLL refclk te tiri ki rx/tx refclk_link ko te 150 Mhz. |
rx_cdr_refclk_link/tx_pll_refclk_link | Rx CDR me Tx PLL Hononga refclk i whakaritea ki te 150 Mhz hei tautoko i nga reeti raraunga Whakaaturanga katoa. |
rx_ls_clkout/tx He clkout | Whakaaturanga Hononga Tere Karaka ki te karaka DisplayPort IP matua. Ko te auau e rite ana ki te Raraunga Raraunga wehewehe ki te whanui raraunga whakarara. Example: Auautanga = reeti raraunga/whanui raraunga = 8.1G (HBR3) / 40bits = 202.5 Mhz |
2.3. Tauranga Whakamatau
Ka whakatairitehia e te papapae whakamatautau whaihanga te whakamuri rangatū WhakaatuPort TX ki RX.
Whakaatu 8. DisplayPort Intel FPGA IP Simplex Mode Simulation Testbench Poraka Hoahoa
Ripanga 5. Nga Waenga Whakamatau
Waehanga | Whakaahuatanga |
Kaihanga Tauira Ataata | Ka hangaia e tenei kaihanga nga tauira pae tae ka taea e koe te whirihora. Ka taea e koe te whakarite i te waa whakatakotoranga ataata. |
Mana Whakamatau | Ko tenei poraka e whakahaere ana i te raupapa whakamatautau o te whaihanga me te whakaputa i nga tohu whakaoho e tika ana ki te TX matua. Ka panuihia e te paraka whakahaere whakamatautau te uara CRC mai i te puna me te totohu hei whakataurite. |
RX Hononga Tere Karaka Karaka Takitaki | Ka tirohia e tenei kaitaki mena ka rite te reeti karaka i whakahokia mai e te RX ki te reeti raraunga e hiahiatia ana. |
TX Hononga Tere Karaka Kaitaki Auautanga | Ka tirohia e tenei kaitaki mena ka rite te reeti karaka i whakahokia mai e te kaiwhakawhitiwhiti TX ki te reeti raraunga e hiahiatia ana. |
Ka mahia e te papa whakamatautau whaihanga nga whakamana e whai ake nei:
Ripanga 6. Whakaaturanga Whakataunga
Paearu Whakamatau | Manatokonga |
• Whakangungu Hononga i te Raraunga Raraunga HBR3 • Panuitia nga rehitatanga DPCD kia tirohia mena ka whakatauhia e te Tūnga DP me te ine i te auau TX me te RX Hononga Tere. |
Ka whakauru i te Kaitaki Auau ki te ine i te whakaputanga auau o te karaka Hononga mai i te whakawhiti TX me te RX. |
• Whakahaere tauira ataata mai i TX ki RX. • Manatokohia te CRC mo te puna me te totohu kia tirohia mena he rite |
• Ka hono i te kaihanga tauira ataata ki te Whakaaturanga Puna hei whakaputa i te tauira ataata. • Ka panuihia e te mana Testbench te puna me te Sink CRC mai i nga rehita DPTX me DPRX me te whakataurite kia rite nga uara CRC e rua. Tuhipoka: Hei whakarite kia tatauhia te CRC, me whakaahei koe i te tawhā aunoatanga whakamatautau Tautoko CTS. |
Hītori Arotake Tuhinga mo te DisplayPort Intel
Agilex F-tile FPGA IP Hoahoa Exampte Aratohu Kaiwhakamahi
Putanga Tuhinga | Intel Quartus Prime Putanga | Putanga IP | Huringa |
2021.12.13 | 21.4 | 21.0.0 | Tukunga tuatahi. |
Intel Corporation. Katoa nga mana. Ko Intel, ko te tohu Intel, me etahi atu tohu Intel he tohu hokohoko na Intel Corporation me ona apiti. Ka whakamanahia e Intel te mahinga o ana hua FPGA me nga hua semiconductor ki nga whakaritenga o naianei i runga i te raihana paerewa a Intel, engari ka whai mana ki te whakarereke i nga hua me nga ratonga i nga wa katoa kaore he panui. Karekau he kawenga, he taunahatanga ranei a Intel i puta mai i te tono, i te whakamahi ranei i nga korero, hua, ratonga ranei e whakaahuatia ana i konei engari i whakaaehia i roto i te tuhi a Intel. Ka tohutohuhia nga kaihoko a Intel ki te tiki i te putanga hou o nga whakaritenga taputapu i mua i te whakawhirinaki ki nga korero kua whakaputaina me i mua i te tuku ota mo nga hua, ratonga ranei.
*Ko etahi atu ingoa me etahi atu tohu ka kiia he taonga na etahi atu.
ISO 9001: 2015 Kua rehitatia
Putanga Ingarihi
Tuku Urupare
UG-20347
ID: 709308
Putanga: 2021.12.13
Tuhinga / Rauemi
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intel DisplayPort Agilex F-Tile FPGA IP Hoahoa Example [pdf] Aratohu Kaiwhakamahi WhakaatuPort Agilex F-Tapa FPGA IP Hoahoa Example, DisplayPort Agilex, F-Tile FPGA IP Hoahoa Example, F-Tile FPGA IP Hoahoa, FPGA IP Hoahoa Example, IP Hoahoa Example, Hoahoa IP, UG-20347, 709308 |